1 : // Copyright 2012 Google Inc. All Rights Reserved.
2 : //
3 : // Licensed under the Apache License, Version 2.0 (the "License");
4 : // you may not use this file except in compliance with the License.
5 : // You may obtain a copy of the License at
6 : //
7 : // http://www.apache.org/licenses/LICENSE-2.0
8 : //
9 : // Unless required by applicable law or agreed to in writing, software
10 : // distributed under the License is distributed on an "AS IS" BASIS,
11 : // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 : // See the License for the specific language governing permissions and
13 : // limitations under the License.
14 : //
15 : // Utility functions for use with disassembler callbacks.
16 :
17 : #ifndef SYZYGY_CORE_DISASSEMBLER_UTIL_H_
18 : #define SYZYGY_CORE_DISASSEMBLER_UTIL_H_
19 :
20 : #include <stdint.h>
21 : #include <string>
22 :
23 : #include "syzygy/assm/register.h"
24 : #include "distorm.h" // NOLINT
25 : #include "mnemonics.h" // NOLINT
26 :
27 m : namespace core {
28 :
29 m : using assm::Register;
30 m : using assm::RegisterId;
31 :
32 : // Wrapper for the distorm_decompose function to patch a bug in distorm.
33 : // @param ci Structure containing some information about the code to decompose
34 : // (code origin, code data, code length, decoding mode and features).
35 : // @param result Array of type _DecodeInst which will be used by this function
36 : // in order to return the disassembled instructions.
37 : // @param max_instructions The maximum number of entries in the result array
38 : // that you pass to this function, so it won't exceed its bound.
39 : // @param used_instructions_count Number of the instruction that successfully
40 : // were disassembled and written to the result array.
41 : // @returns DECRES_SUCCESS on success (no more to disassemble), DECRES_INPUTERR
42 : // on input error (null code buffer, invalid decoding mode, etc...),
43 : // DECRES_MEMORYERR when there are not enough entries to use in the result
44 : // array, BUT YOU STILL have to check for usedInstructionsCount!
45 m : _DecodeResult DistormDecompose(_CodeInfo* ci,
46 m : _DInst result[],
47 m : unsigned int max_instructions,
48 m : unsigned int* used_instructions_count);
49 :
50 : // Decodes exactly one instruction from the given buffer.
51 : // @param address the address of the instruction, as an absolute address
52 : // consistent with the image's base address. If this is not provided a
53 : // fake address of 0x10000000 will be used.
54 : // @param buffer the buffer containing the data to decode.
55 : // @param length the length of the buffer.
56 : // @returns true if an instruction was decoded, false otherwise.
57 m : bool DecodeOneInstruction(uint32_t address,
58 m : const uint8_t* buffer,
59 m : size_t length,
60 m : _DInst* instruction);
61 m : bool DecodeOneInstruction(const uint8_t* buffer,
62 m : size_t length,
63 m : _DInst* instruction);
64 :
65 : // Dump text representation of exactly one instruction to a std::string.
66 : // @param instruction the instruction to dump.
67 : // @param data points to the raw byte sequences.
68 : // @param code_length the size of the raw representation.
69 : // @param buffer receives the text representation.
70 : // @returns true if @p instruction was successfully dumped, false otherwise.
71 m : bool InstructionToString(const _DInst& instruction,
72 m : const uint8_t* data,
73 m : int code_length,
74 m : std::string* buffer);
75 :
76 : // Determines if the given instruction is a recognized no-op. We only recognize
77 : // those instructions that we see generated by the MSVS toolchain.
78 : // @param instruction the instruction to evaluate.
79 : // @returns true if @p instruction is a recognized no-op, false otherwise.
80 m : bool IsNop(const _DInst& instruction);
81 :
82 : // Determines if the given instruction is a CALL.
83 : // @param instruction the instruction to evaluate.
84 : // @returns true if @p instruction is a call, false otherwise.
85 m : bool IsCall(const _DInst& instruction);
86 :
87 : // Determines if the given instruction is a RET.
88 : // @param instruction the instruction to evaluate.
89 : // @returns true if @p instruction is a return, false otherwise.
90 m : bool IsReturn(const _DInst& instruction);
91 :
92 : // Determines if the given instruction is a SYS.
93 : // @param instruction the instruction to evaluate.
94 : // @returns true if @p instruction is a return, false otherwise.
95 m : bool IsSystemCall(const _DInst& instruction);
96 :
97 : // Determines if the given instruction is a conditional branch.
98 : // @param instruction the instruction to evaluate.
99 : // @returns true if @p instruction is a conditional branch, false otherwise.
100 m : bool IsConditionalBranch(const _DInst& instruction);
101 :
102 : // Determines if the given instruction is a unconditional branch.
103 : // @param instruction the instruction to evaluate.
104 : // @returns true if @p instruction is a unconditional branch, false otherwise.
105 m : bool IsUnconditionalBranch(const _DInst& instruction);
106 :
107 : // Determines if the given instruction is a branch or any kind
108 : // @param instruction the instruction to evaluate.
109 : // @returns true if @p instruction is a branch, false otherwise.
110 m : bool IsBranch(const _DInst& instruction);
111 :
112 : // Determines if the given instruction has a PC-relative operand at the
113 : // given operand index.
114 : // @param instruction the instruction to evaluate.
115 : // @param operand_index the operand index to evaluate.
116 : // @returns true if @p instruction has a PC-relative operand at the given index.
117 m : bool HasPcRelativeOperand(const _DInst& instruction, int operand_index);
118 :
119 : // Determines if the given instruction is a control-flow instruction.
120 : // @param instruction the instruction to evaluate.
121 : // @returns true if @p instruction is a control-flow instruction, false
122 : // otherwise.
123 m : bool IsControlFlow(const _DInst& instruction);
124 :
125 : // Determines if the given instruction is an implicit control-flow instruction.
126 : // @param instruction the instruction to evaluate.
127 : // @returns true if @p instruction is an implicit control-flow instruction
128 : // (we can't explicitly compute the target due to the addressing mode)
129 : // false otherwise.
130 m : bool IsImplicitControlFlow(const _DInst& instruction);
131 :
132 : // Determines if the given instruction is an interrupt instruction.
133 : // @param instruction the instruction to evaluate.
134 : // @returns true if @p instruction is an interrupt instruction, false otherwise.
135 m : bool IsInterrupt(const _DInst& instruction);
136 :
137 : // Determines if the given instruction is the debug interrupt instruction.
138 : // @param instruction the instruction to evaluate.
139 : // @returns true if @p instruction is the debug interrupt instruction, false
140 : // otherwise.
141 m : bool IsDebugInterrupt(const _DInst& instruction);
142 :
143 : // @name Distorm _RegisterType conversion.
144 : // @{
145 :
146 : // Converts from a register to a Distorm _RegisterType.
147 : // @param reg The register object whose type we wish to retrieve.
148 : // @returns the Distorm register type.
149 m : _RegisterType GetRegisterType(const Register& reg);
150 :
151 : // Converts from a register id to a Distorm _RegisterType.
152 : // @param reg_id The register id to to convert to a _RegisterType.
153 : // @returns the Distorm register type.
154 m : _RegisterType GetRegisterType(RegisterId reg_id);
155 :
156 : // Given a Distorm register type, converts to a RegisterId.
157 : // @param distorm_reg_type The Distorm register type to be converted.
158 : // @returns the id of the register.
159 m : RegisterId GetRegisterId(uint32_t distorm_reg_type);
160 :
161 : // Given a Distorm register type, returns the associated register object.
162 : // @param distorm_reg_type The Distorm register type to be converted.
163 : // @returns a const reference to the register object.
164 m : const Register& GetRegister(uint32_t distorm_reg_type);
165 :
166 : // @}
167 :
168 m : } // namespace core
169 :
170 : #endif // SYZYGY_CORE_DISASSEMBLER_UTIL_H_
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